DOI | Resolve DOI: https://doi.org/10.1117/12.2178620 |
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Author | Search for: Alonso-Ramos, C.; Search for: Benedikovic, D.; Search for: Cheben, P.1ORCID identifier: https://orcid.org/0000-0003-4232-9130; Search for: Wang, S.1; Search for: Halir, R.; Search for: Fédéli, J. M.; Search for: Ortega-Moñux, A.; Search for: Schmid, J. H.1; Search for: Xu, D. -X.1; Search for: Dado, M.; Search for: Molina-Fernández, I. |
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Affiliation | - National Research Council of Canada. NRC Institute for Microstructural Sciences
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Format | Text, Article |
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Conference | SPIE Optics + Optoelectronics, April 13-15, 2015, Prague, Czech Republic |
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Subject | integrated optics; coupling efficiency; DUV lithography; grating couplers; high-efficiency; silicon photonics; silicon thickness; SOI; SOI substrates; silicon wafers |
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Abstract | We demonstrate a fiber-chip surface grating coupler that interleaves standard full and shallow-etched trenches to maximize directionality in the upward direction. The coupler is implemented in a regular SOI substrate with 220 nm silicon thickness and etch depths of 220 nm (full etch) and 70 nm (shallow etch), as offered by silicon photonic foundries. The blazing effect is controlled by adjusting the separation between the two sets of trenches. This way, grating directionality exceeding 95% is achieved independently of the bottom oxide (BOX) thickness. Couplers have been fabricated at LETI using 193 nm DUV lithography on 200 mm SOI wafers with 2 μm BOX. The measured coupling efficiency is-2.1 dB with a 3 dB bandwidth of 52 nm. |
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Publication date | 2015-05-01 |
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Publisher | SPIE |
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Series | |
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Language | English |
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Peer reviewed | Yes |
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NPARC number | 21276909 |
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Export citation | Export as RIS |
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Report a correction | Report a correction (opens in a new tab) |
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Record identifier | f34ba844-acd5-420b-afc9-df2bab8fd554 |
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Record created | 2015-11-10 |
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Record modified | 2020-04-22 |
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