High efficiency blazed fiber-chip grating coupler with interleaved trenches

From National Research Council Canada

DOIResolve DOI: https://doi.org/10.1117/12.2178620
AuthorSearch for: ; Search for: ; Search for: 1 ; Search for: 1 ; Search for: ; Search for: ; Search for: ; Search for: 1 ; Search for: 1 ; Search for: ; Search for:
Name affiliation
  1. National Research Council Canada. NRC Institute for Microstructural Sciences
FormatText
TypeArticle
Proceedings titleIntegrated Optics: Physics and Simulations II
Series titleProceedings of SPIE; no. 9516
ConferenceSPIE Optics + Optoelectronics, April 13-15, 2015, Prague, Czech Republic
ISSN0277-786X
1996-756X
ISBN9781628416374
Article number95160J
Subjectintegrated optics; coupling efficiency; DUV lithography; grating couplers; high-efficiency; silicon photonics; silicon thickness; SOI; SOI substrates; silicon wafers
Abstract
We demonstrate a fiber-chip surface grating coupler that interleaves standard full and shallow-etched trenches to maximize directionality in the upward direction. The coupler is implemented in a regular SOI substrate with 220 nm silicon thickness and etch depths of 220 nm (full etch) and 70 nm (shallow etch), as offered by silicon photonic foundries. The blazing effect is controlled by adjusting the separation between the two sets of trenches. This way, grating directionality exceeding 95% is achieved independently of the bottom oxide (BOX) thickness. Couplers have been fabricated at LETI using 193 nm DUV lithography on 200 mm SOI wafers with 2 μm BOX. The measured coupling efficiency is-2.1 dB with a 3 dB bandwidth of 52 nm.
Publication date
PublisherSPIE
LanguageEnglish
Peer reviewedYes
NPARC number21276909
Export citationExport as RIS
Report a correctionReport a correction
Record identifierf34ba844-acd5-420b-afc9-df2bab8fd554
Record created2015-11-10
Record modified2019-08-23
Date modified:
Report a problem on this page