| DOI | Resolve DOI: https://doi.org/10.1117/12.2309986 |
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| Author | Search for: Del Rizzo, David A.1; Search for: Garstin, Mark A. B.1 |
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| Editor | Search for: Guzman, Juan C.; Search for: Ibsen, Jorge |
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| Affiliation | - National Research Council of Canada. Herzberg Astronomy and Astrophysics
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| Format | Text, Article |
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| Conference | Software and Cyberinfrastructure for Astronomy V, June 10-15, 2018, Austin, TX, USA |
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| Subject | SKA; CSP; Stratix; FPGA; HPS; kernel; TANGO; correlator |
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| Abstract | We present design considerations and a prototyping progress report for a low-level monitor and control communication system designed to operate on the Stratix-10 System on a Chip (SoC) Field Programmable Gate Array (FPGA) equipped with a Hard Processor System (HPS). The goal of this activity is to allow remote clients to use high level communication protocols (ie. TANGO) to access IP blocks within a Stratix-10 FPGA chip by taking advantage of very low latency communication between HPS and the FPGA fabric, eliminating the need to implement Ethernet protocols within the FPGA logic. |
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| Publication date | 2018-07-06 |
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| Publisher | SPIE |
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| In | |
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| Series | |
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| Language | English |
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| Peer reviewed | Yes |
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| Export citation | Export as RIS |
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| Report a correction | Report a correction (opens in a new tab) |
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| Record identifier | d1455316-ce14-401b-94fe-405958d1b889 |
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| Record created | 2019-04-25 |
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| Record modified | 2020-03-16 |
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