Dielectrophoretic integration of nanodevices with CMOS VLSI circuitry
Dielectrophoretic integration of nanodevices with CMOS VLSI circuitry
| DOI | Resolve DOI: https://doi.org/10.1109/TNANO.2006.869679 |
|---|---|
| Author | Search for: ; Search for: ; Search for: ; Search for: ; Search for: ; Search for: |
| Format | Text, Article |
| Subject | BiCMOS integrated circuits; BiCMOS process; CMOS integrated circuits; CMOS VLSI circuitry; communications circuitry; Complementary metal; complementary metal-oxide; semiconductor circuitry design; cylindrical structures; dielectrophoresis (DEP); dielectrophoretic forces; dielectrophoretic integration; electrophoresis; elemental semiconductors; Ge-Si alloys; integrated circuit design; mixed-mode integrated circuits; nanodevices; nanosensors; nanostructure; nanotechnology; oxide; porous membranes; post-integrated-circuit assembly; semiconductor (CMOS); semiconductor materials; sensors; signal processing; silicon; Si-SiGe; very large scale integration (VLSI); VLSI |
| Abstract | |
| Publication date | 2006-03-13 |
| In | |
| Language | English |
| Peer reviewed | Yes |
| NRC publication | This is a non-NRC publication"Non-NRC publications" are publications authored by NRC employees prior to their employment by NRC. |
| NRC number | 11 |
| NPARC number | 12339033 |
| Export citation | Export as RIS |
| Report a correction | Report a correction (opens in a new tab) |
| Record identifier | cdb33c81-0889-402c-ab9c-38f3be2d81bc |
| Record created | 2009-09-11 |
| Record modified | 2020-04-22 |
- Date modified: