| DOI | Resolve DOI: https://doi.org/10.1143/JJAP.46.6586 |
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| Author | Search for: Chen, Jian-Hao; Search for: Lei, Tan-Fu; Search for: Landheer, Dolf1; Search for: Wu, Xiaohua1; Search for: Ma, Ming-Wen; Search for: Wu, Woei-Cherng; Search for: Yang, Tsung-Yu; Search for: Chao, Tien-Sheng |
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| Affiliation | - National Research Council Canada. NRC Institute for Microstructural Sciences
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| Format | Text, Article |
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| Subject | silicon nanocrystal; floating gate; MOSFET; nonvolatile memory; hemispherically shaped silicon |
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| Abstract | Silicon nanocrystal-embedded memories were fabricated by using the thermal agglomeration of an ultrathin (1.5 –1.8 nm) amorphous silicon (a-Si) film. The a-Si was deposited on a 4-nm tunnel-oxide layer by electron beam evaporation and subsequently annealed in situ at 850 oC for 5 min. Hemispherical Si nanocrystals were self-assembled, and nonvolatile memories were fabricated after depositing a 17-nm control-oxide layer. A threshold voltage window of 0.9V was achieved under write/erase (W/E) voltages of ±10 V, and good endurance characteristics up to 104 cycles were exhibited. Increasing W/E voltages created a large memory window (>2:7 V), and the retention characteristics showed little temperature dependence up to 85 oC. |
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| Publication date | 2007 |
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| In | |
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| NPARC number | 12744756 |
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| Export citation | Export as RIS |
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| Report a correction | Report a correction (opens in a new tab) |
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| Record identifier | 0e78c051-d28f-495a-8449-c308a87d93c0 |
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| Record created | 2009-10-27 |
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| Record modified | 2020-05-10 |
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